[NCLUG] Software Defined Radio Application

[Joseph DiVerdi]

At 11:51 AM -0700 1/20/2003, John L. Bass wrote:
>Hi Joseph,
>
>Spent a good deal of my professional life doing various "real-time" high
>performance data transfer subsystems for a wide variety of applications
>under UNIX and UNIX like systems.
>
>The system architectural design issues, both hardware and software, here
>are critical to meeting your goals.
>
>How the parallel port appears on the hardware bus of your system greatly
>impacts the performance ... if it's effectively an ISA parallel port, then
>the ISA bus speed for each IO instruction to access the parallel port
>will be 3-4 cycles at 8MZ ... for a maximum sampling rate (including
>bandwidth for polling the interface) of between 2-2.3 MByes/sec at the
>IO interface with 100% cpu saturation and discarding the data. Depending
>on the hardware protocol between the radio and the PC parallel port this
>could be a show stopper.
>
>Slightly faster speeds can be obtained if the parallel port is interfaced
>on the system thru a PCI interface ... but very quickly the problem becomes
>the signal quality of the cabling system - rise times, reflections, etc.
>
>This would not be interrupt driven, it would be polled at a driver level,
>and require the driver to return blocks of data, not single samples, if
>you expect any cycles to be left for processing. There is a strong chance
>you will need to do the processing in the middle of the polling loop in
>the driver - the only place there might be enough cycles left over.
>
>There are other ways to interface to the PC ... using a dedicated embedded
>single board computer with an ethernet port might be a lot better.
>
>John Bass
>Owner/DMS Design
>http://www.dmsd.com

Dear John,

Thanks for your detailed comments. I am looking up the motherboard docs to determine the internal interface details.

I am planning to use interrupt driven IO for this application because of the need to measure the phase of the incoming RF signals which implies a phase reference. As such I recognize the task I'm taking on - to craft a suitable driver (probably with a FIFO to address the non-real-time OS).

Please advise why you suggest that single sample return vs block data would represent a greater load on the CPU? Is this because of context switching and interrupt servicing overhead?

Best regards,
Joseph
-- 
Joseph A. DiVerdi, Ph.D., M.B.A.          
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