[NCLUG] July 1, 2003 talk - Linux System Performance

Matt Bruehl mbr at fc.hp.com
Thu Jun 26 15:50:49 MDT 2003


Here are some juicy results from IA64 and PA-RISC platforms.  These tests were all done on 
commercially (or freely) available hardware and software.  All tests were run in multi-user 
mode, with typical apps running (X/ssh/named/nfsd == lightly loaded), but only one user logged 
in (me) through ssh.

I ran an unoptimized and -O2 optimized version of the code on each platform.


Platform 1:
===========
900 Mhz Itanuim2 (McKinley) Single Processor
CPU 0: base freq=200.000MHz, ITC ratio=9/2, ITC freq=900.000MHz
Linux version 2.4.19-mckinley (gcc version 2.96 20000731 (Debian GNU/Linux IA64 experimental))
Calibrating delay loop... 1347.52 BogoMIPS
Memory: 4138480k/4171312k available (5523k code, 32832k reserved, 2198k data, 224k init)

UN-optimized mbench (gcc mbench.c -o mbench):
$ ./mbench
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com

Counts are per clock tick, presumed to be HZ=100
  SetSize        Random    Sequential
-------- ------------- ------------- 0%        25%        50%        75%       100%
     1024   43481 100%   100076 100% |          |       *  |          |          @
     1536   43488 100%   100265 100% |                  *                        @
     2048   43532 100%   100156 100% |          |       *  |          |          @
     3072   43477  99%   100160 100% |                  *                        @
     4096   43532 100%   100160 100% |          |       *  |          |          @
     6144   43477  99%   100160 100% |                  *                        @
     8192   43488 100%   100060  99% |          |       *  |          |          @
    12288   43488 100%   100164 100% |                  *                        @
    16384   43401  99%    99960  99% |          |       *  |          |          @
    24576   41523  95%    86378  86% |                 *                   @
    32768   39938  91%    81024  80% |          |      *   |          |  @       |
    49152   38511  88%    81024  80% |                *                  @
    65536   37778  86%    81105  81% |          |     *    |          |  @       |
    98304   36906  84%    80958  80% |               *                   @
   131072   35926  82%    80879  80% |          |    *     |          |  @       |
   196608   33405  76%    80703  80% |              *                   @
   262144   31744  73%    74166  74% |          |  *       |          @          |
   393216   29315  67%    69658  69% |            *                 @
   524288   27511  63%    68098  68% |          |*         |       @  |          |
   786432   25690  59%    66958  66% |          *                 @
  1048576   24613  56%    64431  64% |          *          |     @    |          |
  1572864   16962  39%    30144  30% |      *     @
  2097152   13018  29%    27264  27% |     *    |@         |          |          |
  3145728    8312  19%    24633  24% |   *      @
  4194304    6834  15%    23715  23% |  *      @|          |          |          |
  6291456    5681  13%    23712  23% | *       @
  8388608    5232  12%    23736  23% | *       @|          |          |          |
12582912    4842  11%    23744  23% | *       @
16777216    4655  10%    23720  23% | *       @|          |          |          |

OPTIMIZED mbench (gcc -O2 mbench.c -o mbench):
$ ./mbench2
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com

Counts are per clock tick, presumed to be HZ=100
  SetSize         Random    Sequential
--------  ------------- ------------- 0%        25%        50%        75%       100%
     1024   222664 100%   277792 100% |          |          |          | *        @
     1536   222656  99%   277514  99% |                                  *        @
     2048   222656  99%   277782  99% |          |          |          | *        @
     3072   222656  99%   277792 100% |                                  *        @
     4096   222656  99%   277792 100% |          |          |          | *        @
     6144   222656  99%   277792 100% |                                  *        @
     8192   222656  99%   277792 100% |          |          |          | *        @
    12288   222656  99%   277792 100% |                                  *        @
    16384   222656  99%   275587  99% |          |          |          | *        @
    24576   186811  83%   148416  53% |                       @     *
    32768   166656  74%   120264  43% |          |       @  |   *      |          |
    49152   145440  65%   120376  43% |                  @   *
    65536   138779  62%   120264  43% |          |       @  *          |          |
    98304   128384  57%   120376  43% |                  @*
   131072   121120  54%   120144  43% |          |       @  |          |          |
   196608    97922  43%   119769  43% |               *  @
   262144    88360  39%   104320  37% |          |  *  @    |          |          |
   393216    71784  32%    85055  30% |          * @
   524288    63008  28%    79856  28% |         *| @        |          |          |
   786432    50002  22%    62178  22% |       * @
  1048576    48418  21%    65922  23% |       * @|          |          |          |
  1572864    29792  13%    35776  12% |    *@
  2097152    19232   8%    29694  10% |  * @     |          |          |          |
  3145728    10240   4%    26144   9% | * @
  4194304     7976   3%    26118   9% |*  @      |          |          |          |
  6291456     6458   2%    26138   9% |*  @
  8388608     5882   2%    26144   9% |*  @      |          |          |          |
12582912     5376   2%    26118   9% |*  @
16777216     5154   2%    26112   9% |*  @      |          |          |          |


Platform 2:
===========
1000 Mhz Itanuim2 (McKinley) Dual Processor SMP
CPU 0: base freq=200.000MHz, ITC ratio=10/2, ITC freq=1000.000MHz
Linux version 2.4.19-mckinley-smp (gcc version 2.96 20000731 (Debian GNU/Linux IA64 experimental))
Calibrating delay loop... 1497.36 BogoMIPS
Mem:   8309232K total,   953520K used,  7355712K free,   258944K buffers

UN-optimized mbench (gcc mbench.c -o mbench):
$ ./mbench
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com

Counts are per clock tick, presumed to be HZ=100
  SetSize         Random    Sequential
--------  ------------- ------------- 0%        25%        50%        75%       100%
     1024    48336 100%   111267 100% |          |       *  |          |          @
     1536    48352 100%   111375 100% |                  *                        @
     2048    48352 100%   111360 100% |          |       *  |          |          @
     3072    48352 100%   111360 100% |                  *                        @
     4096    48352 100%   111360 100% |          |       *  |          |          @
     6144    48352 100%   111360 100% |                  *                        @
     8192    48304  99%   111360 100% |          |       *  |          |          @
    12288    48336 100%   111249  99% |                  *                        @
    16384    48207  99%   111042  99% |          |       *  |          |          @
    24576    46117  95%    96064  86% |                 *                   @
    32768    44639  92%    90112  80% |          |      *   |          |  @       |
    49152    42800  88%    90022  80% |                *                  @
    65536    42028  86%    90106  80% |          |     *    |          |  @       |
    98304    40991  84%    90022  80% |               *                   @
   131072    39953  82%    89926  80% |          |    *     |          |  @       |
   196608    37216  76%    89830  80% |              *                    @
   262144    35819  74%    84597  76% |          |  *       |          @          |
   393216    32576  67%    77408  69% |            *                 @
   524288    30434  62%    75668  68% |          |*         |       @  |          |
   786432    28573  59%    75005  67% |          *                  @
  1048576    27583  57%    75083  67% |          *          |       @  |          |
  1572864    26600  55%    74997  67% |          *                  @
  2097152    25569  52%    72262  64% |         *|          |      @   |          |
  3145728    17892  37%    35776  32% |      *      @
  4194304    13024  26%    27712  24% |    *     @          |          |          |
  6291456     8736  18%    25504  22% |  *      @
  8388608     7225  14%    25504  22% |  *      @|          |          |          |
12582912     6092  12%    25504  22% | *       @
16777216     5589  11%    25504  22% | *       @|          |          |          |

OPTIMIZED mbench (gcc -O2 mbench.c -o mbench):
$ ./mbench2
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com

Counts are per clock tick, presumed to be HZ=100
  SetSize         Random    Sequential
--------  ------------- ------------- 0%        25%        50%        75%       100%
     1024   247243 100%   308727 100% |          |          |          | *        @
     1536   247479 100%   308736 100% |                                  *        @
     2048   247488 100%   308428  99% |          |          |          | *        @
     3072   247488 100%   308725  99% |                                  *        @
     4096   247241  99%   308736 100% |          |          |          | *        @
     6144   247232  99%   308736 100% |                                  *        @
     8192   247232  99%   308736 100% |          |          |          | *        @
    12288   247232  99%   308736 100% |                                  *        @
    16384   247232  99%   306286  99% |          |          |          | *        @
    24576   207377  83%   164928  53% |                       @     *
    32768   185184  74%   133626  43% |          |       @  |   *      |          |
    49152   161600  65%   133766  43% |                  @   *
    65536   154198  62%   133760  43% |          |       @  *          |          |
    98304   142641  57%   133760  43% |                  @*
   131072   134585  54%   133493  43% |          |       @  |          |          |
   196608   108640  43%   132708  42% |              *   @
   262144    98144  39%   115200  37% |          |  * @     |          |          |
   393216    79215  32%    94048  30% |          * @
   524288    69952  28%    90171  29% |         *| @        |          |          |
   786432    61315  24%    88408  28% |        *   @
  1048576    57530  23%    88505  28% |       *  | @        |          |          |
  1572864    53878  21%    85684  27% |       *   @
  2097152    49009  19%    72585  23% |      *  @|          |          |          |
  3145728    27232  11%    40040  12% |   * @
  4194304    17118   6%    29536   9% | * @      |          |          |          |
  6291456    10304   4%    27876   9% |*  @
  8388608     8240   3%    27844   9% |*  @      |          |          |          |
12582912     6766   2%    27812   9% |*  @
16777216     6182   2%    27808   9% |*  @      |          |          |          |


Platform 3:
===========
750 MHz PA-RISC (PA-8700) Dual Processor J6700 Workstation
1.5MB On-chip data cache, 0.75MB on-chip Inst cache
HP-UX B.11.00 U 9000/785
  Physram  Availram  AvailVM Maxdsiz64  Maxdsiz   FreeVM   Swapon CPUs
16777216  15244464  2883584   2883584  2883584 33203648 33554432    2

                         SPEC2000(peak)   SPEC_rate2000(peak)
                         int      fp      int      fp
hp workstation j6700    603  	581  	13.4  	10.5

UN-optimized mbench:
$ ./mbench
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com

Counts are per clock tick, presumed to be HZ=100
  SetSize         Random    Sequential
--------  ------------- ------------- 0%        25%        50%        75%       100%
     1024   489414 100%  2733887 100% |       *  |          |          |          @
     1536   425683  86%  2731157  99% |      *                                    @
     2048   485968  99%  2636263  96% |       *  |          |          |        @ |
     3072   423801  86%  1612890  58% |      *                  @
     4096   486941  99%  2731023  99% |       *  |          |          |          @
     6144   424033  86%  1617671  59% |      *                  @
     8192   488859  99%  2696485  98% |       *  |          |          |         @|
    12288   425625  86%  1610167  58% |      *                  @
    16384   487500  99%  2737986 100% |       *  |          |          |          @
    24576   426228  87%  1618295  59% |      *                  @
    32768   482863  98%  2753896 100% |       *  |          |          |          @
    49152   426869  87%  1608032  58% |      *                  @
    65536   488416  99%  2727833  99% |       *  |          |          |          @
    98304   428206  87%  1620293  59% |      *                  @
   131072   487912  99%  2627884  96% |       *  |          |          |        @ |
   196608   425984  87%  1610420  58% |      *                  @
   262144   479558  97%  2744137 100% |       *  |          |          |          @
   393216   424231  86%  1619727  59% |      *                  @
   524288   491769 100%  2746040 100% |       *  |          |          |          @
   786432   424208  86%  1615055  59% |      *                  @
  1048576   486273  99%  2719140  99% |       *  |          |          |          @
  1572864   422739  86%  1573031  57% |      *                 @
  2097152   473823  96%   387162  14% |     @ *  |          |          |          |
  3145728   423072  86%   333245  12% |    @ *
  4194304   485034  99%   356226  13% |     @ *  |          |          |          |
  6291456   419178  85%   320607  11% |    @ *
  8388608   482010  98%   355850  13% |     @ *  |          |          |          |
12582912   421131  86%   321744  11% |    @ *
16777216   483274  98%   354898  12% |     @ *  |          |          |          |

OPTIMIZED (-O2) mbench:
$ ./mbench2
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com

Counts are per clock tick, presumed to be HZ=100
  SetSize         Random    Sequential
--------  ------------- ------------- 0%        25%        50%        75%       100%
     1024  3912871 100%  1924029 100% |          |          @          |          *
     1536  1459296  37%  1899778  98% |               *    @
     2048  3877423  99%  1889267  98% |          |         @|          |          *
     3072  1467222  37%  2178790 113% |               *        @
     4096  3871238  98%  1938285 100% |          |          @          |          *
     6144  1464072  37%  2187190 113% |               *        @
     8192  3856461  98%  1940601 100% |          |          @          |         *|
    12288  1468998  37%  2189070 113% |                *       @
    16384  3890098  99%  1939733 100% |          |          @          |          *
    24576  1474258  37%  2169683 112% |                *      @
    32768  3894948  99%  1879660  97% |          |         @|          |          *
    49152  1459538  37%  2167335 112% |               *       @
    65536  3866274  98%  1941215 100% |          |          @          |         *|
    98304  1463592  37%  2181751 113% |               *        @
   131072  3918161 100%  1903209  98% |          |         @|          |          *
   196608  1473647  37%  2167409 112% |                *      @
   262144  3889385  99%  1903977  98% |          |         @|          |          *
   393216  1457348  37%  2158219 112% |               *       @
   524288  3898109  99%  1940692 100% |          |          @          |          *
   786432  1464032  37%  2188082 113% |               *        @
  1048576  3873088  98%  1907870  99% |          |         @|          |          *
  1572864  1455153  37%  2116186 109% |               *       @
  2097152  3630777  92%   443264  23% |    @     |          |          |       *  |
  3145728  1392194  35%   329312  17% |   @           *
  4194304  3596730  91%   394963  20% |   @      |          |          |      *   |
  6291456  1420212  36%   324705  16% |   @           *
  8388608  3615416  92%   393816  20% |   @      |          |          |       *  |
12582912  1415722  36%   323480  16% |   @           *
16777216  3594075  91%   390923  20% |   @      |          |          |      *   |

Those last two are strange, so I rebooted and reran...  Same results.

- Matt


---
I speak only for myself and not for my employer.




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