[NCLUG] July 1, 2003 talk - Linux System Performance
Michael Milligan
milli at acmeps.com
Thu Jun 26 08:59:55 MDT 2003
jbass at dmsd.com wrote:
> Mucho thanks to mike at verinet.com and jens001 at attbi.com for help
> in debugging the counter overflow problem in mbench's runtime predictor.
>
> Getting counters cast to unsigned long, plus an inversion seems
> to get the right results out of gcc so that cron and other light
> background activity get reasonably averaged while the test is running.
Here's data from a couple of my boxes. The second of which looks interesting. I ran the
test a couple times to make sure it wasn't a goof.
First up, Pentium III 700Mhz, 224Meg non-ECC memory, 100Mhz FSB, Intel 440BX chipset.
From dmesg:
Initializing CPU#0
Detected 696.981 MHz processor.
Calibrating delay loop... 1389.36 BogoMIPS
Memory: 223880k/229312k available (1505k kernel code, 5044k reserved, 644k data, 124k
init, 0k highmem)
CPU: L1 I cache: 16K, L1 D cache: 16K
CPU: L2 cache: 256K
CPU serial number disabled.
CPU: After generic, caps: 0383f9ff 00000000 00000000 00000000
CPU: Common caps: 0383f9ff 00000000 00000000 00000000
CPU: Intel Pentium III (Coppermine) stepping 03
$ ./mbench
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com
Counts are per clock tick, presumed to be HZ=100
SetSize Random Sequential
-------- ------------- ------------- 0% 25% 50% 75% 100%
1024 2130471 100% 2749737 100% | | | |* @
1536 2143324 100% 2714440 98% | * @
2048 2128429 99% 2744623 99% | | | |* @
3072 2136964 100% 2736399 99% | * @
4096 2132695 100% 2758452 100% | | | |* @
6144 2122094 99% 2742012 99% | * @
8192 2141352 100% 2739277 99% | | | |* @
12288 2128573 99% 2750265 100% | * @
16384 2134981 100% 2728444 99% | | | |* @
24576 1938723 90% 1854914 67% | @*
32768 1783346 83% 1873648 68% | | | *@ | |
49152 1602629 75% 1860640 67% | * @
65536 1527764 71% 1856926 67% | | | * @ | |
98304 1447276 67% 1851374 67% | * @
131072 1384942 65% 1849467 67% | | * @ | |
196608 1320236 61% 1847624 67% | * @
262144 972697 45% 258127 9% | @ | * | | |
393216 396679 18% 149663 5% | @ *
524288 246716 11% 149814 5% | @ * | | | |
786432 161631 7% 155097 5% | @*
1048576 133568 6% 151026 5% | @ | | | |
1572864 113009 5% 156843 5% | *@
2097152 103825 4% 150222 5% | @ | | | |
3145728 97405 4% 152186 5% | @
4194304 93932 4% 150984 5% | @ | | | |
6291456 90744 4% 150225 5% |*@
8388608 89499 4% 157484 5% |* @ | | | |
12582912 86645 4% 150116 5% |*@
16777216 86830 4% 144338 5% |*@ | | | |
Next up, Pentium 4 2Ghz (Northwood), overclocked slightly at 107 mhz main bus ;-), 256Meg
PC2700 memory, 400mhz FSB, Asus P4B533-VM (Intel 845G chipset),
From dmesg:
Initializing CPU#0
Detected 2139.817 MHz processor.
Calibrating delay loop... 4272.94 BogoMIPS
Memory: 256344k/262120k available (1505k kernel code, 5388k reserved, 644k data, 124k
init, 0k highmem)
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: After generic, caps: 3febfbff 00000000 00000000 00000000
CPU: Common caps: 3febfbff 00000000 00000000 00000000
CPU: Intel(R) Pentium(R) 4 CPU 2.00GHz stepping 04
$ ./mbench
Mbench by John. L. Bass, DMS Design copyright 1985-1996
You are free to copy and use this program providing configuration info
and results are shared with the author by email to jbass at dmsd.com
Counts are per clock tick, presumed to be HZ=100
SetSize Random Sequential
-------- ------------- ------------- 0% 25% 50% 75% 100%
1024 2455691 100% 2132906 100% | | | | @ *
1536 2536352 103% 2120073 99% | @ *
2048 2532073 103% 2120073 99% | | | | @ |*
3072 2532073 103% 2120073 99% | @ *
4096 2532073 103% 2120073 99% | | | | @ |*
6144 2532073 103% 2117955 99% | @ *
8192 2534607 103% 2052109 96% | | | | @ |*
12288 487305 19% 810003 37% | * @
16384 2690883 109% 815945 38% | | @ | | |
24576 2385810 97% 824553 38% | @ *
32768 2021888 82% 822907 38% | | @ | | * |
49152 1570501 63% 815977 38% | @ *
65536 1351552 55% 823761 38% | | @ | * | |
98304 1187049 48% 818646 38% | @ *
131072 1073167 43% 812719 38% | | @ * | | |
196608 1048000 42% 4176160 195% | *
262144 809888 32% 1242757 58% | | * @ | |
393216 421574 17% 1305412 61% | * @
524288 312200 12% 860512 40% | * | @ | | |
786432 179455 7% 526283 24% | * @
1048576 133536 5% 451360 21% | * @ | | | |
1572864 102240 4% 451360 21% | * @
2097152 90400 3% 451360 21% | * @ | | | |
3145728 80577 3% 451812 21% |* @
4194304 76224 3% 451808 21% |* @ | | | |
6291456 72032 2% 451808 21% |* @
8388608 70207 2% 451357 21% |* @ | | | |
12582912 68163 2% 451360 21% |* @
16777216 66955 2% 451812 21% |* @ | | | |
--
Michael Milligan -- Free Agent -- milli at acmeps.com
More information about the NCLUG
mailing list